Dr. Jeyavijayan “JV” Rajendran, assistant professor in the Department of Electrical and Computer Engineering at Texas A&M University, has been selected to participate in the Defense Advanced Research Projects Agency (DARPA) Automatic Implementation of Secure Silicon (AISS) program. The four-year, $75 million project aims to automate the process of incorporating security and defense mechanisms into digital integrated circuit designs.
One of many potential applications for this research include devices that are a part of the internet of things, such as smartphones, smartwatches and smart refrigerators. Because these types of devices have become a key target of hacking, it is imperative that security measures are considered during the chip design process. Unlike software cybersecurity, which can be quickly and more easily updated after production, if security measures within chips for these types of devices are thought of after the fact, it could be too late.
With hardware chip manufacturing now mostly being done abroad, the security concerns for intellectual property theft and manufacturing of sensitive defense technologies have become an important issue for national security.
Rajendran heads a research team focused on logic-locking technology on the team led by prime contractor Synopsys. The team, which includes researchers from Arm, Boeing and UltraSoC, will explore the development of a novel design tool and internet protocol ecosystem – which includes tool vendors, chip developers and internet protocol licensors – allowing for defenses to be incorporated efficiently into chip designs.
“It excites me to be part of the larger hardware security community to develop this suite of tools, and also about transitioning the technology from our lab to industry,” Rajendran said.
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